Interfacing Engines and Schedulers in OR-Parallel Prolog Systems

Parallel Prolog systems consist, at least conceptually, of two components: an engine and a scheduler. This paper addresses the problem of deening a clean interface between these components. Such an interface has been designed for Aurora, a prototype or-parallel implementation of the full Prolog language for shared memory multiprocessors. The practical purpose of the interface is to enable diierent engine and scheduler implementations to be used interchangeably. The development of the interface has, however, contributed in great extent to the clariication of issues in exploiting or-parallelism in Prolog. We believe that these issues are relevant to a wider circle of research in the area of or-parallel implementations of logic programming. We believe that the concept of an engine-scheduler interface is applicable to a wider range of parallel Prolog implementations. Indeed, the present interface has been used in the Andorra-I system, which supports both and-and or-parallelism.